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 Freescale Semiconductor Technical Data
MPVZ5010G Rev 0, 09/2005
Integrated Silicon Pressure Sensor On-Chip Signal Conditioned, Temperature Compensated and Calibrated
The MPVZ5010G series piezoresistive transducers are state-of-the-art monolithic silicon pressure sensors designed for the appliance, consumer, healthcare, industrial and automotive market. The analog output can be read directly into the A/D input of Freescale microcontrollers. This transducer combines advanced micromachining techniques, thin-film metallization, and bipolar processing to provide an accurate, high level analog output signal that is proportional to the applied pressure. The axial port has been modified to accommodate industrial grade tubing. Features * * * * 5.0% Maximum Error over 0 to 85C Temperature Compensated over -40 to +125C Durable Thermoplastic (PPS) Package Available in Surface Mount (SMT) or Through-hole (DIP) Configurations
MPVZ5010G SERIES
INTEGRATED PRESSURE SENSOR 0 to 10 kPA (0 to 1019.78 mm H2O) 0.2 to 4.7 V OUTPUT
SMALL OUTLINE PACKAGE SURFACE MOUNT
Application Examples * Washing Machine Water Level Measurement (Reference AN1950) * Ideally Suited for Microprocessor or Microcontroller-Based Systems * Appliance Liquid Level and Pressure Measurement * Respiratory Equipment ORDERING INFORMATION
Device Type Surface Mount Through-Hole Surface Mount Surface Mount Through-Hole Case No. 1735-01 1560-02 482-01 482-01 482B-03 MPVZ Series Order No. MPVZ5010GW6U MPVZ5010GW7U MPVZ5010G6U MPVZ5010G6T1 MPVZ5010G7U Packing Options Rails Rails Rails Tape & Reel Rails Device Marking MZ5010GW MZ5010GW MZ5010G MZ5010G MZ5010G
MPVZ5010GW6U CASE 1735-01
MPVZ5010G6U/T1 CASE 482-01
SMALL OUTLINE PACKAGE THROUGH-HOLE
J
MPVZ5010GW7U CASE 1560-02
MPVZ5010G7U CASE 482B-03
PIN NUMBERS(1)
1 2 3 4 N/C VS GND VOUT 5 6 7 8 N/C N/C N/C N/C
1. Pins 1, 5, 6, 7, and 8 are internal device connections. Do not connect to external circuitry or ground. Pin 1 is noted by the notch in the lead.
(c) Freescale Semiconductor, Inc., 2005. All rights reserved.
VS
Sensing Element
Thin Film Temperature Compensation and Gain Stage #1
Gain Stage #2 and Ground Reference Shift Circuitry
Vout
GND
Pins 1 and 5 through 8 are NO CONNECTS for surface mount package Pins 4, 5, and 6 are NO CONNECTS for unibody package
Figure 1. Fully Integrated Pressure Sensor Schematic Table 1. Maximum Ratings(1)
Rating Maximum Pressure (P1 > P2) Storage Temperature Operating Temperature Symbol Pmax Tstg TA Value 40 -40 to +125 -40 to +125 Unit kPa C C
1. Exposure beyond the specified limits may cause permanent damage or degradation to the device.
MPVZ5010G 2 Sensors Freescale Semiconductor
Table 2. Operating Characteristics (VS = 5.0 Vdc, TA = 25C unless otherwise noted, P1 > P2. Decoupling circuit shown in Figure 3 required to meet specification.)
Characteristic Pressure Range
(1)
Symbol POP VS Io (0 to 85C) (0 to 85C) (0 to 85C) (0 to 85C) Voff VFSO VFSS -- V/P tR IO+ -- --
Min 0 4.75 -- 0 4.475 4.275 -- -- -- -- -- --
Typ -- 5.0 5.0 0.2 4.7 4.5 -- 450 4.413 1.0 0.1 20 0.5
Max 10 1019.78 5.25 10 0.425 4.925 4.725 5.0 -----------
Unit kPa mm H2O Vdc mAdc Vdc Vdc Vdc %VFSS mV/kPa mV/mm H2O ms mAdc ms %VFSS
Supply Voltage(2) Supply Current Minimum Pressure Offset(3) @ VS = 5.0 Volts Full Scale Output(4) @ VS = 5.0 Volts Full Scale Span(5) @ VS = 5.0 Volts Accuracy(6) Sensitivity Response Time(7) Output Source Current at Full Scale Output Warm-Up Time(8) Offset Stability(9) 1. 1.0 kPa (kiloPascal) equals 0.145 psi. 2. Device is ratiometric within this specified excitation range. 3. Offset (Voff) is defined as the output voltage at the minimum rated pressure.
4. Full Scale Output (VFSO) is defined as the output voltage at the maximum or full rated pressure. 5. Full Scale Span (VFSS) is defined as the algebraic difference between the output voltage at full rated pressure and the output voltage at the minimum rated pressure. 6. Accuracy (error budget) consists of the following: * Linearity: Output deviation from a straight line relationship with pressure over the specified pressure range. * Temperature Hysteresis: Output deviation at any temperature within the operating temperature range, after the temperature is cycled to and from the minimum or maximum operating temperature points, with zero differential pressure applied. * Pressure Hysteresis: Output deviation at any pressure within the specified range, when this pressure is cycled to and from the minimum or maximum rated pressure, at 25C. * TcSpan: Output deviation over the temperature range of 0 to 85C, relative to 25C. * TcOffset: Output deviation with minimum rated pressure applied, over the temperature range of 0 to 85C, relative to 25C. * Variation from Nominal: The variation from nominal values, for Offset or Full Scale Span, as a percent of VFSS, at 25C. 7. Response Time is defined as the time for the incremental change in the output to go from 10% to 90% of its final value when subjected to a specified step change in pressure. 8. Warm-up Time is defined as the time required for the product to meet the specified output voltage after the Pressure has been stabilized. 9. Offset Stability is the product's output deviation when subjected to 1000 hours of Pulsed Pressure, Temperature Cycling with Bias Test.
MPVZ5010G Sensors Freescale Semiconductor 3
ON-CHIP TEMPERATURE COMPENSATION, CALIBRATION AND SIGNAL CONDITIONING
The performance over temperature is achieved by integrating the shear-stress strain gauge, temperature compensation, calibration and signal conditioning circuitry onto a single monolithic chip. Figure 2 illustrates the Differential or Gauge configuration in the basic chip carrier (Case 482). A gel die coat isolates the die surface and wire bonds from the environment, while allowing the pressure signal to be transmitted to the sensor diaphragm. The MPVZ5010G series pressure sensor operating characteristics, internal reliability and qualification tests are based on use of dry air as the pressure media. Media, other than dry air, may have adverse effects on sensor performance and long-term reliability. Contact the factory for information regarding media compatibility in your application. Figure 3 shows the recommended decoupling circuit for interfacing the integrated sensor to the A/D input of a microprocessor or microcontroller. Proper decoupling of the power supply is recommended. Figure 4 shows the sensor output signal relative to pressure input. Typical, minimum, and maximum output curves are shown for operation over a temperature range of 0 to 85C using the decoupling circuit shown in Figure 3. The output will saturate outside of the specified pressure range.
Fluoro Silicone Gel Die Coat P1 Wire Bond Lead Frame
Die
Stainless Steel Cap
+5 V
Thermoplastic Case
Vout Vs IPS 1.0 F 0.01 F GND
OUTPUT
470 pF
P2 Differential Sensing Element
Die Bond
Figure 2. Cross-Sectional Diagram SOP (not to scale)
Figure 3. Recommended Power Supply Decoupling and Output Filtering (For additional output filtering, please refer to Application Note AN1646.)
5.0 4.0 3.0 Output (V) 2.0 1.0 0
Transfer Function (kPa): Vout = VS x (0.09 x P + 0.04) 5.0% VFSS VS = 5.0 Vdc TEMP = 0 to 85C
MAX MIN
TYPICAL
0
2.0
4.0
6.0
8.0
10
Differential Pressure (kPa)
Figure 4. Output versus Pressure Differential
MPVZ5010G 4 Sensors Freescale Semiconductor
Transfer Function (MPVZ5010G)
Nominal Transfer Value: Vout = VS x (0.09 x P + 0.04)
(Pressure Error x Temp. Factor x 0.09 x VS) VS = 5.0 V 0.25 Vdc P = kPa
Temperature Error Band
MPVZ5010G SERIES
4.0 3.0 Temperature Error Factor 2.0 1.0 0.0 -40 -20 0 20 40 60 80 100 120 140 Temperature in C NOTE: The Temperature Multiplier is a linear response from 0 to -40C and from 85 to 125C. Temp -40 0 to 85 +125 Multiplier 3 1 3
Pressure Error Band
0.5 0.4 0.3 Pressure Error (kPa) 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 Pressure 0 to 10 (kPa) Error (Max) 0.5 (kPa) 0 1 2 3 4 5 6 7 8 9 10 Pressure (kPa)
MPVZ5010G Sensors Freescale Semiconductor 5
PRESSURE (P1)/VACUUM (P2) SIDE IDENTIFICATION TABLE
Freescale designates the two sides of the pressure sensor as the Pressure (P1) side and the Vacuum (P2) side. The Pressure (P1) side is the side containing a gel die coat which protects the die from harsh media. The MPX pressure sensor
Part Number MPVZ5010GW6U MPVZ5010GW7U MPVZ5010G6U/T1 MPVZ5010G7U
is designed to operate with positive differential pressure applied, P1 > P2. The Pressure (P1) side may be identified by using the table below:
Case Type 1735-01 1560-02 482-01 482B-03 Pressure (P1) Side Identifier Vertical Port Attached Vertical Port Attached Stainless Steel Cap Stainless Steel Cap
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total design. The footprint for the surface mount packages must be the correct size to ensure proper solder connection interface between the board and the package. With the correct footprint, the packages will self align when subjected to a solder reflow process. It is always recommended to design boards with a solder mask layer to avoid bridging and shorting between solder pads.
0.660 16.76
0.100 TYP 8X 2.54
0.060 TYP 8X 1.52
0.300 7.62
0.100 TYP 8X 2.54
inch mm
SCALE 2:1
Figure 5. SOP Footprint (Case 482)
MPVZ5010G 6 Sensors Freescale Semiconductor
PACKAGE DIMENSIONS
PAGE 1 OF 3
CASE 1735-01 ISSUE A SMALL OUTLINE PACKAGE
MPVZ5010G Sensors Freescale Semiconductor 7
PACKAGE DIMENSIONS
PAGE 2 OF 3
CASE 1735-01 ISSUE A SMALL OUTLINE PACKAGE
MPVZ5010G 8 Sensors Freescale Semiconductor
PACKAGE DIMENSIONS
PAGE 3 OF 3
CASE 1735-01 ISSUE A SMALL OUTLINE PACKAGE
MPVZ5010G Sensors Freescale Semiconductor 9
PACKAGE DIMENSIONS
PAGE 1 OF 3
CASE 1560-02 ISSUE C SMALL OUTLINE PACKAGE
MPVZ5010G 10 Sensors Freescale Semiconductor
PACKAGE DIMENSIONS
PAGE 2 OF 3
CASE 1560-02 ISSUE C SMALL OUTLINE PACKAGE
MPVZ5010G Sensors Freescale Semiconductor 11
PACKAGE DIMENSIONS
PAGE 3 OF 3
CASE 1560-02 ISSUE C SMALL OUTLINE PACKAGE
MPVZ5010G 12 Sensors Freescale Semiconductor
PACKAGE DIMENSIONS
-A4 5
D 8 PL 0.25 (0.010)
M
TB
S
A
S
-BG
8 1
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006). 5. ALL VERTICAL SURFACES 5 TYPICAL DRAFT. INCHES MIN MAX 0.415 0.425 0.415 0.425 0.212 0.230 0.038 0.042 0.100 BSC 0.002 0.010 0.009 0.011 0.061 0.071 0 7 0.405 0.415 0.709 0.725 MILLIMETERS MIN MAX 10.54 10.79 10.54 10.79 5.38 5.84 0.96 1.07 2.54 BSC 0.05 0.25 0.23 0.28 1.55 1.80 0 7 10.29 10.54 18.01 18.41
S
N C H -TPIN 1 IDENTIFIER SEATING PLANE
J K M
DIM A B C D G H J K M N S
CASE 482-01 ISSUE O SMALL OUTLINE PACKAGE
-A4 5
-BG
8 1
0.25 (0.010) S N
M
TB
D 8 PL S A
S
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006). 5. ALL VERTICAL SURFACES 5 TYPICAL DRAFT. 6. DIMENSION S TO CENTER OF LEAD WHEN FORMED PARALLEL.
DIM A B C D G J K M N S INCHES MILLIMETERS MIN MAX MIN MAX 0.415 0.425 10.54 10.79 0.415 0.425 10.54 10.79 0.210 0.220 5.33 5.59 0.026 0.034 0.66 0.864 0.100 BSC 2.54 BSC 0.009 0.011 0.23 0.28 0.100 0.120 2.54 3.05 0 15 0 15 0.405 0.415 10.29 10.54 0.540 0.560 13.72 14.22
DETAIL X
PIN 1 IDENTIFIER
C -TK M J DETAIL X
SEATING PLANE
CASE 482B-03 ISSUE B SMALL OUTLINE PACKAGE
MPVZ5010G Sensors Freescale Semiconductor 13
How to Reach Us:
Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) support@freescale.com Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo 153-0064 Japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com Asia/Pacific: Freescale Semiconductor Hong Kong Ltd. Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong +800 2666 8080 support.asia@freescale.com For Literature Requests Only: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-441-2447 or 303-675-2140 Fax: 303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com
Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals", must be validated for each customer application by customer's technical experts. Freescale Semiconductor does not convey any license under its patent rights nor the rights of others. Freescale Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale Semiconductor product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. FreescaleTM and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. (c) Freescale Semiconductor, Inc. 2005. All rights reserved.
MPVZ5010G Rev. 0 09/2005


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